The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Dec. 15, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Dae Youn Cho, Yongin-si, KR;

Jong Woo Park, Yongin-si, KR;

Sang Kil Kim, Yongin-si, KR;

Ji Ho Moon, Yongin-si, KR;

Young Tae Choi, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/043 (2013.01); G09G 2320/045 (2013.01); G09G 2330/028 (2013.01);
Abstract

A pixel including: a light emitting element; a first transistor connected between a first node and a second node, and to generate a driving current to flow from a first power line to a second power line through the light emitting element; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node corresponding to a gate electrode of the first transistor; a fourth transistor connected between the third node and a third power line; a fifth transistor connected between the first power line and the first node; a sixth transistor connected between the second node and a fourth node corresponding to a first electrode of the light emitting element; a seventh transistor connected between the fourth node and a fourth power line; and an eighth transistor connected between the fourth node and a fifth power line.


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