The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2024
Filed:
May. 04, 2022
Haitao O. Dai, Ellicott City, MD (US);
Max E. Nielsen, Riverton, UT (US);
Alexander Louis Braun, Baltimore, MD (US);
Daniel George Dosch, Glen Burnie, MD (US);
Kurt Pleim, Halethorpe, MD (US);
Charles Ryan Wallace, Orlando, FL (US);
Haitao O. Dai, Ellicott City, MD (US);
Max E. Nielsen, Riverton, UT (US);
Alexander Louis Braun, Baltimore, MD (US);
Daniel George Dosch, Glen Burnie, MD (US);
Kurt Pleim, Halethorpe, MD (US);
Charles Ryan Wallace, Orlando, FL (US);
NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US);
Abstract
An output-amplifier-based reciprocal quantum logic (RQL) bias-level sensor is used to measure and/or calibrate bias parameters of AC and/or DC bias signals provided to RQL circuitry. The bias signals can include an output amplifier output bias current. The bias-level sensor includes a stack of DC SQUIDs that are supplied their inputs from outputs of respective Josephson transmission lines (JTLs) to which the SQUIDs are transformer-coupled. Staging relative strengths of the bias taps of the JTLs, or the critical currents of the Josephson junctions in the DC SQUIDs, allows an output voltage signal of the bias-level sensor to be indicative of whether a provided bias value is an improvement or optimization of the bias value when varied over a range. The outputs of two such bias-level sensors driven by I and Q clocks can be compared to adjust AC bias amplitudes of the clocks. Relative clock phase can be similarly adjusted.