The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2024
Filed:
Aug. 04, 2022
Applicant:
Imec Vzw, Leuven, BE;
Inventor:
Jan Van Houdt, Bekkevoort, BE;
Assignee:
IMEC VZW, Leuven, BE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 51/30 (2023.01); G11C 11/22 (2006.01); H10B 51/20 (2023.01);
U.S. Cl.
CPC ...
H10B 51/30 (2023.02); G11C 11/223 (2013.01); G11C 11/2275 (2013.01); H10B 51/20 (2023.02);
Abstract
The present disclosure relates to memory devices, in particular, flash memory devices, storage class memory (SCM) devices or dynamic random access memory (DRAM) devices. The disclosure provides a memory device with a ferroelectric trapping layer. In particular, a memory cell for the memory device comprises a layer stack including: a semiconductor layer; a tunnel layer provided directly on the semiconductor layer; a ferroelectric trapping layer provided directly on the tunnel layer; and a conductive gate layer provided directly on the ferroelectric trapping layer. A blocking layer between the ferroelectric trapping layer and the gate layer may be omitted.