The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2024
Filed:
Dec. 16, 2022
Infineon Technologies Ag, Neubiberg, DE;
Regina Nottelmann, Bad Sassendorf, DE;
Andre Arens, Rüthen, DE;
Michael Ebli, Bad Sassendorf, DE;
Alexander Herbrandt, Soest, DE;
Ulrich Michael Georg Schwarzer, Warstein, DE;
Alparslan Takkac, Meschede, DE;
Infineon Technologies AG, Neubiberg, DE;
Abstract
A method for producing a power semiconductor module arrangement includes: arranging at least one semiconductor substrate in a housing, each semiconductor substrate including a first metallization layer attached to a dielectric insulation layer, the housing including a through hole extending through a component of the housing; inserting a fastener into the through hole such that an upper portion of the fastener is not inserted into the through hole; arranging a printed circuit board on the housing; arranging the housing on a mounting surface, the mounting surface comprising a hole, wherein the housing is arranged on the mounting surface such that the through hole is aligned with the hole in the mounting surface; and exerting a force on the printed circuit board such that the force causes the fastener to be pressed into the hole in the mounting surface so as to secure the housing to the mounting surface.