The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2024

Filed:

Mar. 08, 2023
Applicants:

Samsung Display Co., Ltd., Yongin-si, KR;

Korea Advanced Institute of Science and Technology, Daejeon, KR;

Inventors:

Kyungtea Park, Seoul, KR;

Kun-Woo Park, Daejeon, KR;

Jae-Hyun Chung, Daejeon, KR;

Ohjo Kwon, Suwon-si, KR;

Seung-Tak Ryu, Daejeon, KR;

Keumdong Jung, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/38 (2006.01); G06F 3/01 (2006.01);
U.S. Cl.
CPC ...
H03M 1/38 (2013.01); G06F 3/01 (2013.01);
Abstract

An analog-to-digital converter includes: a sample/hold circuit, which samples an analog signal, and outputs a first voltage; a digital-to-analog conversion circuit, which converts a digital signal to output a second voltage; an amplifier, which amplifies the first voltage and the second voltage; a noise shaping filter, which integrates a residual voltage corresponding to a difference between the amplified first voltage and the amplified second voltage, and generates a first integration voltage and a second integration voltage; a comparator, which compares a sum of the amplified first voltage, the first integration voltage, and the second integration voltage with the amplified second voltage; and a SAR logic, which outputs the digital signal according to a comparison result of the comparator, and controls the digital-to-analog conversion circuit.


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