Precision internal low-frequency oscillator to generate real-time clock

Abstract

An oscillation circuit includes resistors with tap points for high/low reference voltages. An RC network coupled in parallel with the resistors includes a first capacitor to vary a first voltage input and a second capacitor to generate a second voltage input. A first comparator alternately compares the voltage inputs with the low reference voltage to generate oscillation outputs. A PTAT current DAC supplies an injection current to a resistor of the series of resistors that variably modulates the reference voltages. A second comparator alternately compares the voltage inputs with the high reference voltage and controls generation of an adaptive bias current to first comparator near a switching threshold voltage range thereof. A chop switch matrix alternately flips voltage reference inputs to input terminals of first comparator. A multiplexer alternately inverts a polarity of the oscillation outputs in concert with alternately flipping the voltage reference inputs by the chop switch matrix.