The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2024

Filed:

Mar. 17, 2022
Applicant:

Northeastern University, Boston, MA (US);

Inventors:

Aatmesh Shrivastava, Boston, MA (US);

Nikita Mirchandani, Allston, MA (US);

Assignee:

Northeastern University, Boston, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/07 (2006.01); G06F 21/75 (2013.01); H02M 1/00 (2007.01); H04L 9/00 (2022.01);
U.S. Cl.
CPC ...
H02M 3/07 (2013.01); G06F 21/755 (2017.08); H02M 1/0003 (2021.05); H04L 9/003 (2013.01);
Abstract

Side channel attacks (SCA) such as correlation power analysis (CPA) have been demonstrated to be very effective in breaking cryptographic engines. The inherent dependence of the power consumption on the secret key can be exploited by statistical analysis to retrieve the key. Various embodiments disclosed herein relate to a new power obfuscation switched capacitor (POSC) DC-DC converter design, which can conceal the leakage of information through power consumption. It works by adding an extra phase to the conventional two-phase switched capacitor (SC) converter, during which a part of the charge from the flying capacitor is extracted and stored on a storage capacitor. This guarantees that the same amount of charge is drawn from the input power supply in each cycle. The design was successfully evaluated by analyzing the power supply to an Advanced Encryption Standard (AES) unit powered by the converter.


Find Patent Forward Citations

Shrivastava, Aatmesh. (2024). High efficiency power obfuscation switched capacitor dc-dc converter architecture (U.S. Patent No. 12040703). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12040703

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…