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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12035527 B1

PDFFull Text
Date of Patent:
Jul. 09, 2024

Filed:

Jul. 13, 2021

Semiconductor device and method for fabricating the same

Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Yoo Hyun Noh, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:

WILLIAM PARK & ASSOCIATES LTD.

Primary Examiner:

Ali Naraghi

Assistant Examiner:

E. Rhett Cheek

Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02);
Abstract

A method for fabricating a semiconductor device includes preparing a lower structure including an interconnection, forming a first contact plug coupled to the interconnection, and forming an alternating stack of dielectric layers and sacrificial layers over the first contact plug and the lower structure. The method further includes forming an opening that penetrates the alternating stack and exposes the first contact plug, forming a sacrificial plug including a void in the opening, forming a contact hole that exposes the first contact plug by etching a portion of the sacrificial plug, and forming a second contact plug in the contact hole.

Find Patent Forward Citations

Noh, Yoo. (2024). Semiconductor device and method for fabricating the same (U.S. Patent No. 12035527). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12035527

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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