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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12035060 B1

PDFFull Text
Date of Patent:
Jul. 09, 2024

Filed:

Nov. 05, 2021

Stacked image sensor

Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:

Zhiyong Zhan, Fremont, CA (US);

Yin Qian, Milpitas, CA (US);

Assignee:

OmniVision Technologies, Inc., Santa Clara, CA (US);

Attorney:

COZEN O'CONNOR

Primary Examiner:

Twyler L Haskins

Assistant Examiner:

Akshay undefined Trehan

Int. Cl.
CPC ...
H04N 25/70 (2023.01); G03B 17/55 (2021.01); H01L 27/146 (2006.01); H04N 23/52 (2023.01); H04N 23/54 (2023.01); H04N 23/57 (2023.01); H04N 25/709 (2023.01); H04N 25/79 (2023.01); H05K 1/02 (2006.01); H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
H04N 25/70 (2023.01); G03B 17/55 (2013.01); H01L 27/14601 (2013.01); H01L 27/14618 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H04N 23/52 (2023.01); H04N 23/54 (2023.01); H04N 23/57 (2023.01); H04N 25/709 (2023.01); H04N 25/79 (2023.01); H05K 1/0203 (2013.01); H05K 1/0206 (2013.01); H05K 7/2039 (2013.01); H05K 2201/10121 (2013.01);
Abstract

A stacked image sensor includes a signal-processing circuitry layer, a pixel-array substrate, a heat-transport layer, and a thermal via. The signal-processing circuitry layer includes a conductive pad exposed on a circuitry-layer bottom surface of the signal-processing circuitry layer. The pixel-array substrate includes a pixel array and is disposed on a circuitry-layer top surface of the signal-processing circuitry layer. The circuitry-layer top surface is between the circuitry-layer bottom surface and the pixel-array substrate. The heat-transport layer is located between the signal-processing circuitry layer and the pixel-array substrate. The thermal via thermally couples the heat-transport layer to the conductive pad.

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