The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Oct. 14, 2022
Applicant:

Keysight Technologies, Inc., Santa Rosa, CA (US);

Inventors:

Razvan Ionut Stan, Agoura Hills, CA (US);

Thomas Ameling, Woodland Hills, CA (US);

Lyle Eugene Thompson, Mentone, CA (US);

Assignee:

KEYSIGHT TECHNOLOGIES, INC., Santa Rosa, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 43/50 (2022.01); H04L 12/54 (2022.01); H04L 43/045 (2022.01); H04L 43/0894 (2022.01); H04L 47/34 (2022.01); H04L 49/00 (2022.01);
U.S. Cl.
CPC ...
H04L 43/50 (2013.01); H04L 43/045 (2013.01); H04L 43/0894 (2013.01); H04L 49/3063 (2013.01); H04L 12/54 (2013.01); H04L 47/34 (2013.01);
Abstract

A method for using a programmable processing pipeline to implement an application replay sequence test or a scalable CPS generation test includes obtaining a sequence replay definition code package from a sequence relay definition storage element and converting the sequence replay definition code package into a hardware configuration image. The method further includes provisioning the hardware configuration image on at least one programmable processing pipeline device, causing the at least one programmable processing pipeline device to implement a test session connection initiator and a test session receiver, and utilizing the hardware configuration image to establish a first test session connection from the test session connection initiator and the test session connection receiver through a system under test (SUT). The method also includes conducting a programmable application replay sequence test or a scalable CPS generation test through the SUT using definition information contained in the hardware configuration image.


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