The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Sep. 21, 2020
Applicant:

D-wave Systems Inc., Burnaby, CA;

Inventor:

Kelly T. R. Boothby, Vancouver, CA;

Assignee:

1372934 B.C. LTD., Burnaby, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2023.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/50 (2013.01); H05K 1/181 (2013.01); H05K 1/182 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/17155 (2013.01); H01L 2224/17505 (2013.01); H01L 2224/81815 (2013.01); H05K 2201/09072 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/10537 (2013.01);
Abstract

This disclosure generally relates to processor systems comprising printed circuit boards, I/O chips and processor chips with mated contacts. Contacts are formed on an upper surface of a printed circuit board having a through-hole and on a processor chip inside the through-hole. The processor chip may be a superconducting quantum processor chip comprising qubits, couplers, Digital to Analog converters, QFP shift registers and analog lines. Contacts are formed on an upper surface on an I/O chip and mated with the contacts on the printed circuit board and the processor chip. Contacts may be Indium bump bonds or superconducting solder bonds. The processor chip and the I/O chip may include a shield layer, a substrate layer and a thermally conductive layer.


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