The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Mar. 21, 2022
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventor:

Jordi Mola, Bellevue, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 12/0811 (2016.01); G06F 12/1027 (2016.01);
U.S. Cl.
CPC ...
G06F 11/364 (2013.01); G06F 12/0811 (2013.01); G06F 12/1027 (2013.01);
Abstract

Omitting or obfuscating physical memory addresses within an execution trace. A microprocessor identifies a first translation lookaside buffer (TLB) entry mapping a first virtual memory page to a physical memory page, and initiates logging of the first TLB entry by initiating logging of at least a first virtual address of the first virtual memory page and a first identifier. The microprocessor identifies a second TLB entry mapping a second virtual memory page to the physical memory page, and initiates logging of the second TLB entry by initiating logging of at least a second virtual address of the second virtual memory page and a second identifier. The microprocessor determines that the first and second TLB entries are each live, logged into the execution trace, and mapped to the same physical address, and ensures that the execution trace indicates that the first and second TLB entries each map to the physical address.


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