The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2024

Filed:

Jan. 13, 2023
Applicant:

Realtek Semiconductor Corp., HsinChu, TW;

Inventor:

Tsung-Ming Chen, HsinChu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/091 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/091 (2013.01); G06F 1/08 (2013.01);
Abstract

A clock generating circuit includes a control circuit and a phase interpolator. The control circuit converts an input signal to generate an encoded signal having multiple bits and adjusts arrangement of the bits according to a pointer to generate a control signal having multiple control bits. The phase interpolator includes a first driving circuit, a second driving circuit and an output terminal configured to output an interpolated clock signal. The first driving circuit receives a first clock signal and includes multiple first driving units that are turned on or off to drive the first clock signal in response to multiple first control bits in the control bits. The second driving circuit receives a second clock signal and includes multiple second driving units that are turned on or off to drive the second clock signal in response to multiple second control bits in the control bits.


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