The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2024

Filed:

Dec. 05, 2022
Applicant:

Synaptics Incorporated, San Jose, CA (US);

Inventors:

Chandra Shekar Reddy Ayya, Hyderabad, IN;

Jae Won Choi, Irvine, CA (US);

Assignee:

Synaptics Incorporated, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/08 (2006.01); G06F 1/14 (2006.01);
U.S. Cl.
CPC ...
G06F 1/14 (2013.01); G06F 1/08 (2013.01);
Abstract

Quadrature clock generation circuits and techniques are disclosed. An example quadrature clock generator includes an in-phase (I) clock generation circuit to generate an I clock signal based on a reference clock signal, the I clock signal and the reference clock signal each having a first frequency, a quadrature phase (Q) clock generation circuit to generate a Q clock signal based on the reference clock signal, a rise time control signal, and a fall time control signal, the Q clock signal having the first frequency, and a control circuit to generate the rise time control signal and the fall time control signal based on the I clock signal and the Q clock signal.


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