The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Jul. 05, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Yoonjee Shin, Hwaseong-si, KR;

Kyunghyun Baek, Suwon-si, KR;

Seokje Seong, Seongnam-si, KR;

Wooho Jeong, Anyang-si, KR;

Yoon-jong Cho, Seongnam-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10K 59/123 (2023.01); G09G 3/3233 (2016.01); H01L 27/12 (2006.01); H01L 29/417 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10K 50/805 (2023.01); H10K 59/121 (2023.01); H10K 59/124 (2023.01); G09G 3/3225 (2016.01);
U.S. Cl.
CPC ...
H10K 59/123 (2023.02); G09G 3/3233 (2013.01); H01L 29/41733 (2013.01); H01L 29/4908 (2013.01); H01L 29/66757 (2013.01); H10K 50/805 (2023.02); H10K 59/1213 (2023.02); H10K 59/124 (2023.02); G09G 3/3225 (2013.01); G09G 2300/0426 (2013.01); H01L 27/1225 (2013.01); H01L 29/7869 (2013.01);
Abstract

A display panel includes a base layer, a first thin film transistor disposed on the base layer and including a silicon semiconductor pattern, a first control electrode is spaced apart from the silicon semiconductor pattern. A first input electrode is connected to a first side of the silicon semiconductor pattern. A first output electrode is connected to a second side of the silicon semiconductor pattern. The display panel includes a second thin film transistor. An organic light emitting diode includes a first electrode connected to the first thin film transistor, a second electrode, and an emission layer. A first insulating layer includes openings exposing the first side and the second side of the silicon semiconductor pattern, respectively. The first input electrode and the first output electrode are positioned in the openings respectively.


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