The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2024
Filed:
Mar. 26, 2020
Nexfi Technology Inc., Suita, JP;
Osaka University, Suita, JP;
Kei Nishioka, Suita, JP;
Toshio Hanada, Suita, JP;
Takashi Nakamura, Suita, JP;
Tsuyoshi Funaki, Suita, JP;
NaxFI Technology Inc., Osaka, JP;
Osaka University, Osaka, JP;
Abstract
A power substrate () of the present invention includes a plurality of insulating substrates () arranged side by side along a plurality of current paths (P) extending in the same direction, a plurality of MOS transistors () mounted on one major surface of each of the plurality of insulating substrates () with a first conductive layer () and a first solder bonding layer () in between, and a heat dissipation member () in contact with other major surfaces of all of the insulating substrates with a second conductive layer () and a second solder bonding layer () in between, and each of the current paths (P) is formed by connecting one or more of the MOS transistors () mounted on one of the insulating substrates () with one or more of the MOS transistors () mounted on a different one of the insulating substrates () in series with each other.