The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Aug. 09, 2019
Applicant:

Omron Corporation, Kyoto, JP;

Inventors:

Hiroki Ishibashi, Kyoto, JP;

Hiroyuki Onishi, Kyoto, JP;

Assignee:

OMRON CORPORATION, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 1/00 (2006.01); H02M 7/219 (2006.01);
U.S. Cl.
CPC ...
H02M 1/4208 (2013.01); H02M 1/0009 (2021.05); H02M 1/0058 (2021.05); H02M 1/4225 (2013.01); H02M 1/4233 (2013.01); H02M 7/219 (2013.01);
Abstract

A control circuit is provided for a power converter apparatus including a PFC circuit with an inductor and operating in a current critical mode. The control circuit includes: a first detector circuit that detects an inductor current, amplifies a voltage corresponding to a detected current with a gain, and outputs the voltage as a detected voltage; a comparator that compares the detected voltage with a reference voltage, and outputs a comparison result signal; a second detector circuit that detects an input voltage; and a third detector circuit that detects an output voltage. The control circuit calculates a reference voltage for making a delay on detecting zero value of the inductor current be substantially zero, based on the input voltage, the detected output voltage, a preset delay time, an inductance, a conversion coefficient on current-to-voltage converting, a power supply voltage, and the gain, and outputs the reference voltage to the comparator.


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