The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2024
Filed:
Mar. 04, 2021
Western Digital Technologies, Inc., San Jose, CA (US);
Rui Yuan, Shanghai, CN;
Hope Chiu, Shanghai, CN;
Paul Qu, Shanghai, CN;
Kevin Du, Shanghai, CN;
Zengyu Zhou, Shanghai, CN;
Yi Su, Shanghai, CN;
Shixing Zhu, Shanghai, CN;
Western Digital Technologies, Inc., San Jose, CA (US);
Abstract
A memory device includes a substrate, a controller die, a flip chip die, first and second silicon dies, and bond wires. The controller and flip chip dies are attached to the substrate using connection balls and in electrical communication with each other. The first and second silicon dies include respective first and second contact pad surfaces. The bond wires electrically connect the contact pad surfaces to the substrate so the first and second silicon dies communicate with the controller die. The flip chip die and first and second silicon dies are NAND dies, the flip chip die is configured as SLC memory, and the silicon dies are configured as one of MLC memory, TLC memory, or QLC memory.