The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2024
Filed:
May. 26, 2021
Applicant:
Fuji Electric Co., Ltd., Kawasaki, JP;
Inventors:
Hiroaki Hokazono, Hachioji, JP;
Ryoichi Kato, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/373 (2006.01); H01L 25/00 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/4871 (2013.01); H01L 23/3735 (2013.01); H01L 24/32 (2013.01); H01L 24/40 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 24/84 (2013.01); H01L 25/072 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/40225 (2013.01); H01L 2224/73263 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/8484 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/12032 (2013.01); H01L 2924/12036 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/3512 (2013.01);
Abstract
A semiconductor device includes: a first semiconductor chip having a metal layer on a top surface; a first wiring member arranged to face the metal layer; a sintered-metal layer arranged between the metal layer and the first wiring member, having a first region and a plurality of second regions provided inside the first region, the second regions having lower tensile strength than the first region; and a metallic member arranged inside the sintered-metal layer, wherein the second regions of the sintered-metal layer have lower tensile strength than the metal layer of the first semiconductor chip.