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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12020766 B1

PDFFull Text
Date of Patent:
Jun. 25, 2024

Filed:

Mar. 10, 2022

Memory circuit architecture with multiplexing between memory banks

Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Pradeep Raj, Uttar Pradesh, IN;

Rahul Sahu, Bangalore, IN;

Sharad Kumar Gupta, Bangalore, IN;

Hemant Patel, Bangalore, IN;

Diwakar Singh, Bangalore, IN;

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:

Haynes and Boone, LLP

Primary Examiner:

J H Hur

Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/06 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1012 (2013.01); G11C 7/06 (2013.01); G11C 7/106 (2013.01); G11C 7/1087 (2013.01); G11C 7/1096 (2013.01); G11C 7/12 (2013.01);
Abstract

One implementation includes a random access memory (RAM) that has a muted multiplexing functionality. For instance, a RAM may be implemented having a first outer bank, a first inner bank, a second outer bank, and a second inner bank, each coupled to a controller. Multiplexing circuits for the outer banks may be disposed adjacent the outer banks and away from the controller, whereas the multiplexing circuits for the inner banks may be disposed within or adjacent to the controller.

Find Patent Forward Citations

Raj, Pradeep. (2024). Memory circuit architecture with multiplexing between memory banks (U.S. Patent No. 12020766). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12020766

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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