The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Mar. 10, 2022
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Apoorv Parle, Santa Clara, CA (US);

Ronny Krashinsky, Santa Clara, CA (US);

John Edmondson, Santa Clara, CA (US);

Jack Choquette, Santa Clara, CA (US);

Shirish Gadre, Santa Clara, CA (US);

Steve Heinrich, Santa Clara, CA (US);

Manan Patel, Santa Clara, CA (US);

Prakash Bangalore Prabhakar, Jr., Santa Clara, CA (US);

Ravi Manyam, Santa Clara, CA (US);

Wish Gandhi, Santa Clara, CA (US);

Lacky Shah, Santa Clara, CA (US);

Alexander L. Minkin, Santa Clara, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 5/06 (2006.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01); G06F 9/52 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); H04L 49/101 (2022.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 9/522 (2013.01); G06F 13/1689 (2013.01); G06F 13/4022 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01); H04L 49/101 (2013.01);
Abstract

This specification describes a programmatic multicast technique enabling one thread (for example, in a cooperative group array (CGA) on a GPU) to request data on behalf of one or more other threads (for example, executing on respective processor cores of the GPU). The multicast is supported by tracking circuitry that interfaces between multicast requests received from processor cores and the available memory. The multicast is designed to reduce cache (for example, layer 2 cache) bandwidth utilization enabling strong scaling and smaller tile sizes.


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