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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12015088 B1

PDFFull Text
Date of Patent:
Jun. 18, 2024

Filed:

Mar. 17, 2023

Display device and method of fabricating the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Sang Sub Kim, Suwon-si, KR;

Keun Woo Kim, Seongnam-si, KR;

Ji Yeong Shin, Suwon-si, KR;

Yong Su Lee, Seoul, KR;

Myoung Geun Cha, Seoul, KR;

Ki Seok Choi, Seoul, KR;

Sang Gun Choi, Suwon-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:

KILE PARK REED & HOUTTEMAN PLLC

Primary Examiner:

Eduardo A Rodela

Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H10K 59/121 (2023.01); G09G 3/32 (2016.01); H01L 21/225 (2006.01); H01L 21/265 (2006.01); H01L 21/28 (2006.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H01L 29/78603 (2013.01); H01L 27/1274 (2013.01); H01L 29/6675 (2013.01); H10K 59/1213 (2023.02); G09G 3/32 (2013.01); G09G 2300/0809 (2013.01); H01L 21/2253 (2013.01); H01L 21/26533 (2013.01); H01L 21/28158 (2013.01); H01L 27/1255 (2013.01); H10K 59/1201 (2023.02);
Abstract

A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.

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