The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2024

Filed:

May. 20, 2021
Applicant:

Wolfspeed, Inc., Durham, NC (US);

Inventors:

Kyle Bothe, Cary, NC (US);

Joshua Bisges, Wake Forest, NC (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/324 (2006.01); H01L 21/76 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66462 (2013.01); H01L 21/30612 (2013.01); H01L 21/7605 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/401 (2013.01); H01L 29/402 (2013.01); H01L 29/4175 (2013.01); H01L 29/7786 (2013.01); H01L 21/02252 (2013.01); H01L 21/26546 (2013.01); H01L 21/3245 (2013.01);
Abstract

A method of forming a high electron mobility transistor (HEMT) includes: providing a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate; forming a first insulating layer on the barrier layer; and forming a gate contact, a source contact, and a drain contact on the barrier layer. An interface between the first insulating layer and the barrier layer comprises a modified interface region on a drain access region and/or a source access region of the semiconductor structure such that a sheet resistance of the drain access region and/or the source access region is between 300 and 400 Ω/sq.


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