The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2024

Filed:

Jun. 02, 2023
Applicants:

Wuhan Tianma Microelectronics Co., Ltd., Wuhan, CN;

Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch, Shanghai, CN;

Inventors:

Mengmeng Zhang, Wuhan, CN;

Yue Li, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/20 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G11C 19/28 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2330/021 (2013.01);
Abstract

A shift register includes a plurality of cascaded shift register circuits. The first control module of a shift register circuit controls the potential of a first node according to a first clock signal, a second clock signal, and the potential of the first node. A second control module controls the potential of a second node according to the first level signal of a third clock signal and the potential of the first node. An output module controls, according to the potential of the first node, the time of outputting the first level signal and controls, according to the potential of the second node, the time of outputting a second level signal. In a data writing phase, the third clock signal includes a plurality of effective pulses. In at least in a first retention frame, the third clock signal is an ineffective fixed level.


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