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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12014214 B1

PDFFull Text
Date of Patent:
Jun. 18, 2024

Filed:

Apr. 15, 2021

Tile subsystem and method for automated data flow and data processing within an integrated circuit architecture

Applicant:

Mythic, Inc., Austin, TX (US);

Inventors:

Malav Parikh, Austin, TX (US);

Sergio Schuler, Austin, TX (US);

Vimal Reddy, Austin, TX (US);

Zainab Zaidi, Austin, TX (US);

Paul Toth, Austin, TX (US);

Adam Caughron, Austin, TX (US);

Bryant Sorensen, Austin, TX (US);

Alex Dang-Tran, Austin, TX (US);

Scott Johnson, Austin, TX (US);

Raul Garibay, Austin, TX (US);

Andrew Morten, Austin, TX (US);

David Fick, Cedar Park, TX (US);

Assignee:

Mythic, Inc., Austin, TX (US);

Attorneys:

Padowithz Alce

Alce PLLC

Primary Examiner:

Wissam Rashid

Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 9/48 (2006.01); G06N 3/045 (2023.01); G06F 7/544 (2006.01); G06F 7/57 (2006.01); G06F 9/30 (2018.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5027 (2013.01); G06F 9/4843 (2013.01); G06N 3/045 (2023.01); G06F 7/5443 (2013.01); G06F 7/57 (2013.01); G06F 9/3001 (2013.01); G06F 9/5061 (2013.01); G06F 15/7807 (2013.01);
Abstract

A system and method for a computing tile of a multi-tiled integrated circuit includes a plurality of distinct tile computing circuits, wherein each of the plurality of distinct tile computing circuits is configured to receive fixed-length instructions; a token-informed task scheduler that: tracks one or more of a plurality of distinct tokens emitted by one or more of the plurality of distinct tile computing circuits; and selects a distinct computation task of a plurality of distinct computation tasks based on the tracking; and a work queue buffer that: contains a plurality of distinct fixed-length instructions, wherein each one of the fixed-length instructions is associated with one of the plurality of distinct computation tasks; and transmits one of the plurality of distinct fixed-length instructions to one or more of the plurality of distinct tile computing circuits based on the selection of the distinct computation task by the token-informed task scheduler.

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