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H10K 59/121 (2023.01); H01L 27/12 (2006.01); H10K 10/46 (2023.01); H10K 59/123 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 50/818 (2023.01); H10K 50/828 (2023.01); H10K 59/122 (2023.01);

U.S. Cl.

CPC ...

H10K 10/478 (2023.02); H01L 27/1214 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/123 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 50/818 (2023.02); H10K 50/828 (2023.02); H10K 59/122 (2023.02);

Abstract

A display apparatus includes a plurality of pixels each including a substrate on which are disposed: an interlayer insulating layer; a driving thin film transistor in which a driving semiconductor layer and a driving gate electrode are each disposed between the substrate and the first interlayer insulating layer; a first capacitor in which a first electrode, a first dielectric pattern and a second electrode are sequentially stacked, the first electrode being connected to the driving gate electrode; and a plurality of contact plugs extended through a thickness of the interlayer insulating layer, with which the driving thin film transistor and the first capacitor are respectively connected to electrodes outside thereof. Lateral surfaces of the first dielectric pattern are covered by the interlayer insulating layer, and the first dielectric pattern within the first capacitor is disposed spaced apart from each of the contact plugs.

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