The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2024
Filed:
Dec. 29, 2021
Applicant:
Fuji Electric Co., Ltd., Kawasaki, JP;
Inventor:
Kenshi Terashima, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kawasaki, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 25/072 (2013.01); H01L 25/18 (2013.01); H01L 23/49811 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/2912 (2013.01); H01L 2224/32157 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48237 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/0132 (2013.01); H01L 2924/014 (2013.01);
Abstract
A conductive plate includes a first slit formed in the space between a first chip area and a second chip area, a second slit formed in the space between the first chip area and a terminal area, and a third slit formed in the space between the second chip area and the terminal area. The first slit is a continuous line that penetrates through the conductive plate, whereas the second and third slits are continuous lines that do not penetrate through the conductive plate.