The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Jul. 14, 2023
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Motoyoshi Kubouchi, Matsumoto, JP;

Kosuke Yoshida, Matsumoto, JP;

Soichi Yoshida, Matsumoto, JP;

Koh Yoshikawa, Matsumoto, JP;

Nao Suganuma, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 21/22 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01); H01L 21/66 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/32 (2006.01); H01L 29/40 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); H01L 21/221 (2013.01); H01L 21/265 (2013.01); H01L 21/26526 (2013.01); H01L 21/324 (2013.01); H01L 27/0664 (2013.01); H01L 29/0611 (2013.01); H01L 29/0615 (2013.01); H01L 29/0619 (2013.01); H01L 29/0623 (2013.01); H01L 29/1095 (2013.01); H01L 29/32 (2013.01); H01L 29/407 (2013.01); H01L 29/7397 (2013.01); H01L 29/8613 (2013.01);
Abstract

A semiconductor device includes trench portions arrayed in a first direction on an upper surface side of a semiconductor substrate, a first conductivity type lower surface region provided in a part of a lower surface of the semiconductor substrate, a second conductivity type base region provided on the upper surface side, a first conductivity type first region disposed between the base region and the lower surface region, a first conductivity type upper surface region provided on an upper surface of the semiconductor substrate, and a second conductivity type bottom region disposed continuously in the first direction to be in contact with bottom portions of the trench portions. In a cross section along the first direction and perpendicular to the upper and lower surfaces and passing through the lower surface region, one end portion of the bottom region in the first direction locates directly above the lower surface region.


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