The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Mar. 25, 2022
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Siddharth Gupta, Noida, IN;

Cyrille Nicolas Dray, Antibes, FR;

Luc Olivier Palau, Grasse, FR;

Sachin Gulyani, Noida, IN;

Antony John Penton, Little Canfield, GB;

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G11C 29/00 (2006.01); G11C 29/12 (2006.01); G11C 29/18 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/18 (2013.01); G11C 29/4401 (2013.01); G11C 29/785 (2013.01); G11C 2029/1202 (2013.01);
Abstract

An apparatus is provided having a memory device and associated access control circuitry, and an additional memory device and associated additional access control circuitry. Redundant data generation circuitry generates, for a given block of data having an associated given memory address, an associated block of redundant data for use in an error detection process. The access control circuitry is arranged to store, at a location in the memory device determined from the given memory address, at least a portion of the given block of data and a first copy of the associated block of redundant data, and the additional access control circuitry is arranged to store, at a location in the additional memory device determined from the given memory address, any remaining portion of the given block of data not stored in the memory device and a second copy of the associated block of redundant data. Error detection circuitry performs the error detection process on the stored given block of data using one copy of the associated block of redundant data, and generates an output signal indicating a result of the error detection process. Comparison circuitry compares the first and second copies of the associated block of redundant data, and generates a comparison result signal to supplement the output signal from the error detection circuitry.


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