The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Nov. 08, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kyoung Ju Shin, Yongin-si, KR;

Hee Ju Ma, Yongin-si, KR;

Sung Rak Hong, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/22 (2006.01); G06F 3/041 (2006.01); G09G 3/32 (2016.01); H10K 59/40 (2023.01);
U.S. Cl.
CPC ...
G09G 3/22 (2013.01); G06F 3/04166 (2019.05); G09G 3/32 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/027 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0247 (2013.01); G09G 2330/021 (2013.01); H10K 59/40 (2023.02);
Abstract

A pixel includes a light emitting element, a first transistor connected to the light emitting element, a second transistor connected between a data line and a first electrode of the first transistor, a third transistor connected between a gate electrode of the first transistor Tand a second electrode of the first transistor, a fourth transistor connected between a gate electrode of the first transistor and an initialization power source, and a storage capacitor connected between the first power source and the gate electrode of the first transistor. A voltage provided through the data line is time divided into a data voltage provided to the gate electrode of the first transistor when both the second and third transistors turn on, and an on-bias voltage provided to the first electrode of the first transistor when the second transistor turns on and the third transistor turns off.


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