The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Apr. 27, 2022
Applicant:

Sony Interactive Entertainment Inc., Tokyo, JP;

Inventor:

Roelof Roderick Colenbrander, Costa Mesa, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/38 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); H04L 49/351 (2022.01); H04L 67/1097 (2022.01);
U.S. Cl.
CPC ...
G06F 13/382 (2013.01); G06F 13/1668 (2013.01); G06F 13/4022 (2013.01); G06F 13/4221 (2013.01); G06F 13/4282 (2013.01); H04L 49/351 (2013.01); H04L 67/1097 (2013.01); G06F 2213/0026 (2013.01); G06F 2213/3808 (2013.01);
Abstract

A network architecture including network storage. The network architecture includes a plurality of streaming arrays, each streaming array including a plurality of compute sleds, wherein each compute sled includes one or more compute nodes. The network architecture includes a PCI Express (PCIe) fabric configured to provide direct access to the network storage from compute nodes of each of the plurality of streaming arrays, the PCIe fabric including a plurality of array-level PCIe switches, each array-level PCIe switch communicatively coupled to compute nodes of compute sleds of a corresponding streaming array and communicatively coupled to the storage server. The network storage is shared by the plurality of streaming arrays.


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