The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2024
Filed:
Jul. 13, 2022
Fuji Electric Co., Ltd., Kanagawa, JP;
Kenichi Ishii, Matsumoto, JP;
Atsushi Yoshida, Matsumoto, JP;
Tomonori Mori, Matsumoto, JP;
Takashi Shiigi, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Abstract
Provided is a test method of a semiconductor device under test, the test method comprising: controlling the semiconductor device under test to an on state by inputting a control signal to the semiconductor device under test; and observing the semiconductor device under test at a time of controlling the semiconductor device under test in the on state to an off state and evaluating the semiconductor device under test, wherein the semiconductor device under test includes one semiconductor device under test or a plurality of semiconductor devices under test, and in the controlling to the on state, a length of an on-time for which the one semiconductor device under test or the plurality of semiconductor devices under test are set to the on state is adjusted based on a magnitude of a variation in a delay time of the control signal.