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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12002821 B1

PDFFull Text
Date of Patent:
Jun. 04, 2024

Filed:

Jun. 25, 2021

Display apparatus and method of manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Joongeol Kim, Yongin-si, KR;

Seulki Kim, Yongin-si, KR;

Youngjae Jeon, Yongin-si, KR;

Hyunseong Kang, Yongin-si, KR;

Seungrae Kim, Yongin-si, KR;

Jongin Kim, Yongin-si, KR;

Seokhwan Bang, Yongin-si, KR;

Seungsok Son, Yongin-si, KR;

Donghoon Shin, Yongin-si, KR;

Kapsoo Yoon, Yongin-si, KR;

Kwangsoo Lee, Yongin-si, KR;

Woogeun Lee, Yongin-si, KR;

Jaehyun Lee, Yongin-si, KR;

Kisu Jin, Yongin-si, KR;

Junewhan Choi, Yongin-si, KR;

Jongmoo Huh, Yongin-si, KR;

Jiyun Hong, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:

KILE PARK REED & HOUTTEMAN PLLC

Primary Examiner:

Douglas M Menz

Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 25/16 (2023.01); H10K 59/124 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 25/167 (2013.01); H01L 27/124 (2013.01); H01L 27/1248 (2013.01); H10K 59/124 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02);
Abstract

A display apparatus includes a substrate including a display area and a peripheral area adjacent to the display area, a thin-film transistor located in the display area of the substrate and including a semiconductor layer and a gate electrode overlapping a channel region of the semiconductor layer, a conductive layer disposed between the substrate and the semiconductor layer and including a first electrode located in the display area of the substrate and a pad electrode located in the peripheral area of the substrate, and a first insulating layer disposed between the conductive layer and the semiconductor layer and having a first opening that exposes at least a portion of an upper surface of the pad electrode.

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