The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Nov. 26, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Young Lyong Kim, Anyang-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/3128 (2013.01); H01L 23/3171 (2013.01); H01L 24/06 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/50 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/81815 (2013.01);
Abstract

A semiconductor package includes a first semiconductor chip mounted on a substrate, a first conductive post disposed on the substrate and spaced apart from the first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip and the first conductive post, and a mold layer on the substrate that covers the first and second semiconductor chips and the first conductive post. The second semiconductor chip is supported on the first semiconductor chip by a first dummy solder terminal provided between the first and second semiconductor chips, and is coupled to the first conductive post by a first signal solder terminal provided between the first conductive post and the second semiconductor chip. The first dummy solder terminal is in direct contact with a top surface of the first semiconductor chip, and is electrically disconnected from the second semiconductor chip.


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