The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Jan. 25, 2023
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Sebastian Michalski, Berlin, DE;

Guido Bönig, Warstein, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 1/02 (2006.01); H01L 23/00 (2006.01); H01L 23/053 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 21/4853 (2013.01); H05K 1/0263 (2013.01); H01L 23/053 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/072 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A printed circuit board including a dielectric insulation layer having a top side facing a first side and a bottom side opposite the first side that faces a second side of the dielectric insulation layer, at least one conducting track formed on the dielectric insulation layer, and one or more conductor rails, wherein each of the one or more conductor rails is mechanically coupled to the dielectric insulation layer, and a first portion of each of the one or more conductor rails is arranged on the first side and a second portion of each of the one or more conductor rails is arranged on the second side of the dielectric insulation layer.


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Michalski, Sebastian. (2024). Printed circuit board, power semiconductor module arrangement comprising a printed circuit board, and method for assembling the same (U.S. Patent No. 12002740). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12002740

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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