The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Aug. 08, 2022
Applicant:

Taiyo Yuden Co., Ltd., Tokyo, JP;

Inventors:

Yasuyuki Inomata, Tokyo, JP;

Kazumichi Hiroi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/12 (2006.01); C04B 35/468 (2006.01); C04B 35/64 (2006.01); H01G 4/008 (2006.01); H01G 4/012 (2006.01); H01G 4/30 (2006.01);
U.S. Cl.
CPC ...
H01G 4/1227 (2013.01); C04B 35/4682 (2013.01); C04B 35/64 (2013.01); H01G 4/008 (2013.01); H01G 4/012 (2013.01); H01G 4/30 (2013.01);
Abstract

A ceramic electronic device includes a multilayer structure in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked. Each of the plurality of dielectric layers includes ceramic grains of a main component thereof expressed by (BaCaSr)(TiZr)O(0<x≤0.2, 0≤y≤0.1, 0≤z≤0.1). D3<D1<D2 is satisfied when an average grain diameter of the ceramic grains of the main component of the plurality of dielectric layers in a section in which each two internal electrode layers is D1, an average grain diameter of the ceramic grains of the main component of first dielectric layers which are located at different height positions from the internal electrode layers is D2, an average grain diameter of the ceramic grains of the main component of second dielectric layers which are located at same height positions of the internal electrode layers is D3.


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