The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2024
Filed:
Jun. 16, 2022
Applicant:
Dell Products L.p., Round Rock, TX (US);
Inventors:
Wei G. Liu, Austin, TX (US);
Alberto D. Perez Guevara, Pflugerville, TX (US);
Sanjeev Singh, Cedar Park, TX (US);
Assignee:
Dell Products L.P., Round Rock, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4221 (2013.01); G06F 9/5044 (2013.01); G06F 2213/0026 (2013.01);
Abstract
An information handling system may detect whether each one of a plurality of peripheral component interconnect express (PCIe) slots is populated or unpopulated, and update a PCIe bus configuration map to indicate whether each of the PCIe slots is populated. The system may also allocate PCIe bus resources to each of the PCIe slots based on the PCIe bus configuration map, wherein the allocating of the PCIe bus resources includes prioritizing populated PCIe slots over unpopulated PCIe slots.