The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2024

Filed:

Oct. 28, 2022
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

MooKyoung Hong, Gyeonggi-do, KR;

Uitaek Jeong, Gyeonggi-do, KR;

HyeonWoo Lee, Gyeonggi-do, KR;

DongKyu Yang, Seoul, KR;

SinKyun Park, Gyeonggi-do, KR;

SeungWon Lee, Gyeonggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3233 (2016.01); G09G 3/3283 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 3/3283 (2013.01); G09G 2300/0413 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0214 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01);
Abstract

A display device can include a display panel having a plurality of subpixels; a gate driving circuit configured to supply a plurality of scan signals to the display panel through a plurality of gate lines, and output a feedback voltage; a data driving circuit configured to supply a plurality of data voltages to the display panel through a plurality of data lines; a power management circuit configured to supply a plurality of driving voltages to the gate driving circuit and the data driving circuit, and supply a compensating high-potential gate voltage to the gate driving circuit based on the feedback voltage transferred from the gate driving circuit. The display device can further include a timing controller configured to control the gate driving circuit, the data driving circuit, and the power management circuit.


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