The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Nov. 21, 2022
Applicant:

Seeqc Inc., Elmsford, NY (US);

Inventors:

Daniel Yohannes, Stamford, CT (US);

Mario Renzullo, Yonkers, NY (US);

John Vivalda, Pleasantville, NY (US);

Alexander Kirichenko, Pleasantville, NY (US);

Assignee:

SeeQC, Inc., Elmsford, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 11/44 (2006.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01); H10N 60/84 (2023.01); H10N 69/00 (2023.01);
U.S. Cl.
CPC ...
H10N 60/84 (2023.02); G11C 11/44 (2013.01); H10N 60/12 (2023.02); H10N 60/805 (2023.02); H10N 69/00 (2023.02);
Abstract

Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 μA/μm; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.


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