The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Aug. 30, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sung-Min Hwang, Hwaseong-si, KR;

Joon-Sung Lim, Seongnam-si, KR;

Eunsuk Cho, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/40 (2023.01); H01L 25/065 (2023.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/50 (2023.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H01L 25/0657 (2013.01); H01L 29/4234 (2013.01); H01L 29/66833 (2013.01); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/50 (2023.02);
Abstract

A semiconductor memory device includes a first semiconductor chip and a second semiconductor chip. Each semiconductor chip of the first and second semiconductor chips may include a cell array region and a peripheral circuit region. The cell array region may include an electrode structure including electrodes sequentially stacked on a body conductive layer and vertical structures extending through the electrode structure and connected to the body conductive layer. The peripheral circuit region may include a residual substrate on the body conductive layer and on which a peripheral transistor is located. A bottom surface of the body conductive layer of the second semiconductor chip may face a bottom surface of the body conductive layer of the first semiconductor chip.


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