The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Mar. 10, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Joohun Han, Hwaseong-si, KR;

Junhee Choi, Seongnam-si, KR;

Nakhyun Kim, Yongin-si, KR;

Dongho Kim, Seoul, KR;

Jinjoo Park, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/08 (2010.01); H01L 27/15 (2006.01); H01L 33/00 (2010.01); H01L 33/14 (2010.01); H01L 33/30 (2010.01);
U.S. Cl.
CPC ...
H01L 33/145 (2013.01); H01L 27/156 (2013.01); H01L 33/0062 (2013.01); H01L 33/0095 (2013.01); H01L 33/30 (2013.01);
Abstract

A nanorod light emitting device, a method of manufacturing the same, and a display apparatus including the nanorod light emitting device are provided. The nanorod light emitting device includes a first semiconductor layer doped with a first conductivity type, a light emitting layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the light emitting layer and doped with a second conductivity type that is electrically opposite to the first conductivity type, wherein a distance between a lower surface of the first semiconductor layer and an upper surface of the second semiconductor layer is in a range of about 2 μm to about 10 μm, wherein a difference between a diameter of the upper surface of the second semiconductor layer and the lower surface of the first semiconductor layer is 10% or less of a diameter of the upper surface of the second semiconductor layer.


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