The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Aug. 05, 2019
Applicant:

Sumco Corporation, Tokyo, JP;

Inventors:

Masayuki Ishibashi, Tokyo, JP;

Midori Yoshida, Tokyo, JP;

Daisuke Maruoka, Tokyo, JP;

Assignee:

SUMCO CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C30B 25/10 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02532 (2013.01); C30B 25/10 (2013.01); H01L 21/02433 (2013.01); H01L 21/0262 (2013.01); H01L 21/30625 (2013.01);
Abstract

To provide a silicon epitaxial wafer production method and a silicon epitaxial wafer in which the DIC defects can be suppressed, a silicon epitaxial wafer production method is provided, in which an epitaxial layer is grown in a vapor phase on a principal plane of a silicon single crystal wafer. The principal plane is a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane. The silicon epitaxial wafer production method includes setting a temperature of the silicon single crystal wafer to 1100° C. to 1135° C. and growing the epitaxial layer in the vapor phase at a growth rate of 2.0 μm/min to 3.0 μm/min.


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Ishibashi, Masayuki. (2024). Silicon epitaxial wafer production method and silicon epitaxial wafer (U.S. Patent No. 11990336). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11990336

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