The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2024
Filed:
Sep. 23, 2020
Applicant:
Honeywell International Inc., Morris Plains, NJ (US);
Inventors:
Paul Francis McLaughlin, Ambler, PA (US);
Christopher Paul Ladas, Doylestown, PA (US);
Assignee:
HONEYWELL INTERNATIONAL INC., Charlotte, NC (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G05B 19/4155 (2006.01); G06F 9/455 (2018.01); G06F 11/07 (2006.01); G06F 11/16 (2006.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G05B 19/4155 (2013.01); G06F 9/45558 (2013.01); G06F 11/0727 (2013.01); G06F 11/073 (2013.01); G06F 11/0751 (2013.01); G06F 11/0778 (2013.01); G06F 11/1666 (2013.01); G06F 11/2028 (2013.01); G06F 11/2033 (2013.01); G05B 2219/31368 (2013.01); G06F 2009/45583 (2013.01);
Abstract
An implementation is for one or more hardware-based non-transitory memory devices storing computer-readable instructions which, when executed by the one or more processors disposed in a computing device, cause the computing device to monitor a logic block and a memory block to detect a fault condition, determine a subset of the logic block or the memory block that is impacted by the fault condition, and perform at least one action on the logic block and the memory block.