The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

May. 20, 2021
Applicant:

Silergy Semiconductor Technology (Hangzhou) Ltd, Zhejiang, CN;

Inventors:

Zhiwei Xu, Zhejiang, CN;

Chiqing Fang, Zhejiang, CN;

Chen Zhao, Zhejiang, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 30/80 (2023.01); B06B 1/02 (2006.01); H10N 30/20 (2023.01);
U.S. Cl.
CPC ...
H10N 30/802 (2023.02); B06B 1/0207 (2013.01); H10N 30/20 (2023.02);
Abstract

A driving circuit and a driving method are provided. The driving circuit includes a charging circuit and a discharging circuit. The charging circuit is configured to receive an input voltage to charge the piezoelectric load. The piezoelectric load discharges electricity through the discharging circuit. Operation states of the charging circuit and the discharging circuit are controlled. During a first operation interval of an operation period, the charging circuit charges the piezoelectric load so that a power supply voltage signal provided to the piezoelectric load corresponds to the reference voltage in a first interval. During a second operation interval of the operation period, the piezoelectric load discharges electricity through the discharging circuit so that the power supply voltage signal corresponds to the reference voltage in a second interval. The driving circuit according to the present disclosure requires a few switches, thereby facilitating circuit integration.


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