The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

Dec. 18, 2019
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Woori Seo, Yongin-si, KR;

Injun Bae, Yongin-si, KR;

Donghwi Kim, Yongin-si, KR;

Chulho Kim, Yongin-si, KR;

Yunhwan Park, Yongin-si, KR;

Dongbeom Lee, Yongin-si, KR;

Jin Jeon, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/00 (2006.01); G09G 3/3225 (2016.01); G09G 3/3266 (2016.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 77/10 (2023.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H10K 59/1213 (2023.02); G09G 3/3225 (2013.01); G09G 3/3266 (2013.01); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); H10K 77/10 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0439 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01);
Abstract

A display panel includes: a substrate that includes a display area and a sensor area, where the display area includes a main pixel and the sensor area includes an auxiliary pixel, where the main pixel is electrically connected to a main pixel circuit and the auxiliary pixel is electrically connected to an auxiliary pixel circuit, where the auxiliary pixel circuit includes a first auxiliary thin film transistor that includes a first semiconductor layer that includes an oxide semiconductor material and a first gate electrode that overlaps the first semiconductor layer, and a second auxiliary thin film transistor that including a second semiconductor layer that includes Low Temperature Poly-Silicon (LTPS) and a second gate electrode that overlaps the second semiconductor layer.


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