The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

May. 26, 2022
Applicant:

North Carolina State University, Raleigh, NC (US);

Inventors:

M A Awal, Raleigh, NC (US);

Srdjan Lukic, Raleigh, NC (US);

Iqbal Husain, Raleigh, NC (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/217 (2006.01); H02M 1/00 (2006.01); H02M 1/04 (2006.01); H02M 1/12 (2006.01); H02M 1/36 (2007.01); H02M 3/335 (2006.01); H02M 7/219 (2006.01); H02M 7/797 (2006.01);
U.S. Cl.
CPC ...
H02M 7/2173 (2013.01); H02M 1/0012 (2021.05); H02M 1/0067 (2021.05); H02M 1/007 (2021.05); H02M 1/0074 (2021.05); H02M 1/045 (2013.01); H02M 1/12 (2013.01); H02M 1/36 (2013.01); H02M 3/33573 (2021.05); H02M 3/33584 (2013.01); H02M 7/219 (2013.01); H02M 7/797 (2013.01);
Abstract

Disclosed herein is a modular, scalable, and galvanically isolated power electronics converter topology for medium voltage AC (MVAC) to DC or high voltage AC (HVAC) to DC power conversion. A disclosed modular converter can comprise a low-voltage direct current bus and a centralized controller configured to regulate the low-voltage direct current bus. The modular converter can further comprise a plurality of three-phase blocks connected in series. Individual three-phase blocks of the plurality of three-phase blocks can comprise a plurality of single-phase modules connected in an input-series output-parallel configuration. The modular converter can further comprise a filter connected between a grid input and the plurality of three-phase blocks and a pulse-width modulator configured to generate encoded gate pulses for the individual three-phase blocks of the plurality of three-phase blocks.


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