The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

Oct. 22, 2020
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Yasunori Agata, Matsumoto, JP;

Takashi Yoshimura, Matsumoto, JP;

Hiroshi Takishita, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/36 (2006.01); H01L 21/265 (2006.01); H01L 27/07 (2006.01); H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01); H01L 29/861 (2006.01); H01L 29/868 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/36 (2013.01); H01L 21/265 (2013.01); H01L 27/0716 (2013.01); H01L 29/1095 (2013.01); H01L 29/739 (2013.01); H01L 29/7397 (2013.01); H01L 29/78 (2013.01); H01L 29/861 (2013.01); H01L 29/8611 (2013.01); H01L 29/868 (2013.01); H01L 29/0611 (2013.01);
Abstract

Provided is a semiconductor device including a buffer region. Provided is a semiconductor device including: semiconductor substrate of a first conductivity type; a drift layer of the first conductivity type provided in the semiconductor substrate; and a buffer region of the first conductivity type provided in the drift layer, the buffer region having a plurality of peaks of a doping concentration, wherein the buffer region has: a first peak which has a predetermined doping concentration, and is provided the closest to a back surface of the semiconductor substrate among the plurality of peaks; and a high-concentration peak which has a higher doping concentration than the first peak, and is provided closer to an upper surface of the semiconductor substrate than the first peak is.


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