The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2024
Filed:
Oct. 13, 2023
Applicant:
Auradine, Inc., Santa Clara, CA (US);
Inventors:
Assignee:
Auradine, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/367 (2006.01); H05K 3/00 (2006.01); H05K 3/30 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/3675 (2013.01); H05K 3/0085 (2013.01); H05K 3/303 (2013.01);
Abstract
A circuit board assembly is provided. The circuit board assembly includes a circuit board and a plurality of chips assembled on a surface of the circuit board. The plurality of chips include integrated circuit (IC) chips. At least two chips are positioned on the surface of the circuit board adjacent to one another with a spacing separating the two chips that is less than a minimum dimension of each of the two chips. A method for circuit board assembly is also provided.
Reddy, Anuya. (2024). Circuit board assembly having circuit board with adjacent chips immersed in dielectric liquid and method of making the same (U.S. Patent No. 11984391). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11984391
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile