The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2024
Filed:
Oct. 17, 2022
Applicant:
Kioxia Corporation, Minato-ku, JP;
Inventor:
Hiroyuki Nagashima, Yokohama, JP;
Assignee:
Kioxia Corporation, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G06F 11/10 (2006.01); G11C 11/56 (2006.01); G11C 16/14 (2006.01); G11C 16/24 (2006.01); G11C 16/34 (2006.01); G06F 11/34 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G06F 11/1048 (2013.01); G11C 11/5628 (2013.01); G11C 11/5642 (2013.01); G11C 16/14 (2013.01); G11C 16/24 (2013.01); G11C 16/34 (2013.01); G11C 16/3418 (2013.01); G06F 11/3466 (2013.01); G06F 2201/88 (2013.01); G11C 16/0483 (2013.01);
Abstract
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.