The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2024
Filed:
Mar. 08, 2023
Dell Products L.p., Round Rock, TX (US);
Robert Proulx, Holden, MA (US);
Erhan Aslan, Jamaica Plain, MA (US);
Samuel Hudson, Pittsfield, MA (US);
Dell Products L.P., Round Rock, TX (US);
Abstract
A pseudo Single Level Cell (pSLC)-scan-based storage device initialization system includes a chassis, a storage subsystem that is housed in the chassis, and a pSLC-scan-based storage device initialization subsystem that is housed in the chassis and coupled to the storage subsystem. The pSLC-scan-based storage device initialization subsystem reads respective subsets of pSLC data from the storage subsystem over a plurality of different read voltage thresholds, and identifies a first read voltage threshold that is included in the plurality of different read voltage thresholds and at which a respective first subset of the pSLC data read from the storage subsystem experienced errors within a predetermined error range. The pSLC-scan-based storage device initialization subsystem then uses the first read voltage threshold to estimate a powered-off data retention time for the storage subsystem, and performs post-data-retention initialization operations based on the powered-off data retention time for the storage subsystem.